Replacing conventional silicon oxide (e.g. SiO2) gate dielectrics with silicon oxynitride (e.g. SiON) layers for MOS transistors reduces gate dielectric leakage and boron (B) penetration from the gate electrode into the semiconductor surface which can result in Vt shifts. A conventional method to form a SiON gate dielectric layer includes thermal oxidation of silicon to form a SiO2 base dielectric, followed by a plasma nitridation to incorporate nitrogen (N) throughout the SiO2 dielectric, and then a thermal anneal in O2/N2 at around 1100° C.
This conventional method results in a relatively constant N concentration in the thickness direction of the SiON layer. It is known that as the N concentration in the bulk of the SiON layer is increased, gate leakage and boron penetration (for B doped polysilicon gates) into the semiconductor surface decreases, and that as the N concentration at the semiconductor interface increases, the carrier mobility at the semiconductor surface (and thus the device transconductance (Gm)), as well as delta threshold voltage (Vt) and negative bias temperature instability (NBTI) all degrade. Therefore, due to the relatively constant N concentration in the thickness direction of the SiON layer provided by the conventional method, the amount of N that can be incorporated into the bulk of the SiON layer is limited by the degree of carrier mobility degradation due to N at the semiconductor interface that can be tolerated in the IC design. This situation results in a trade-off in the N concentration in the SiON layer between the amount of leakage reduction/B blocking and the carrier mobility (and thus Gm). As a result of this tradeoff, the N concentration selected is generally no more than about 10-15 atomic %.